Issue Date	Title	Author(s)
23-Sep-2011	Performance metrics for characterization of a seizure detection algorithm for offline and online use	Logesparan, L; Casson, AJ; Rodriguez-Villegas, E
15-Mar-2009	Performance metrics for the accurate characterisation of interictal spike detection algorithms.	Casson, AJ; Luna, E; Rodriguez-Villegas, E
31-Dec-2002	Performance-area trade-off of address generators for address decoder- decoupled memory	Hettiaratchi,S.; Cheung,P.Y.K.; Clarke,T.J.W.
1-Jan-2003	Perturbation analysis for word-length optimization	Constantinides, GA
1-Jan-2006	PowerBit - Power aware arithmetic bit-width optimization	Gaffar, AA; Clarke, JA; Constantinides, GA
1-Dec-2010	Quantifying the performance of compressive sensing on scalp EEG signals	Abdulghani; CASSON; RODRIGUEZ VILLEGAS, E
Sep-2006	Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs	Campregher, N; Cheung, P Y K; Constantinides, G A; Vasilko, M
28-Jan-2011	A review and modern approach to LC ladder synthesis	Casson, AJ; Rodriguez-Villegas, E
1-Jun-2004	SiGe HMODFET "KAIST" micropower model and amplifier realization	Vilches, A; Fobelets, K; Michelakis, K; Despotopoulos, S; Papavassiliou, C, et al
1-Apr-2005	SiGe HMOSFET monolithic inverting current mirror	Michelakis, K; Despotopoulos, S; Papavassiliou, C; Vilches, A; Fobelets, K, et al
15-Mar-2004	SiGe virtual substrate HMOS transistor for analogue applications	Michelakis, K; Despotopoulos, S; Gaspari, V; Vilches, A; Fobelets, K, et al
1-Jan-2010	Standard filter approximations for low power Continuous Wavelet Transforms.	Casson, AJ; Rodriguez-Villegas, E
1-Jan-2002	Strassen's matrix multiplication for customisable processors	Ip,H.M.D.; Low,J.D.; Cheung,P.Y.K.; Constantinides,G.; Luk,W., et al
20-Aug-2012	A Sub 1uW, 16kHz Current-Mode SAR-ADC for Neural Spike Recording	Haaheim, B; Constandinou, TG
31-Dec-2011	A sub-1μW Neural Spike-Peak Detection and Spike-Count Rate Encoding Circuit	Paraskevopoulou, S; Constandinou, TG
1-Jun-2011	A Subhertz Nanopower Low-Pass Filter	Rodriguez-Villegas, E; Casson, AJ; Corbishley, P
30-Sep-2006	Symbolic framework for linear active circuits based on port equivalence using limit variables	Haigh, D G; Clarke, T J W; Radmore, P M
31-May-2003	Synthesis and optimization of interfaces between hardware modules with incompatible protocols	Androutsopoulos,V.; Clarke,T.J.W.; Brookes,D.M.
1-Dec-2009	Toward online data reduction for portable electroencephalography systems in epilepsy.	Casson, AJ; Rodriguez-Villegas, E
20-Aug-2012	Towards a Fully-Integrated Solution for Capacitor-Based Neural Stimulation	Mirza, KB; Luan, S; Constandinou, TG