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Enhancement of Power System Loading Capacity Through Low Order Robust Control Design

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Title: Enhancement of Power System Loading Capacity Through Low Order Robust Control Design
Authors: Simfukwe, Dumisani Dunwell
Item Type: Thesis or dissertation
Abstract: Today’s power systems are becoming heavily loaded and operating close to their stability limit. This raises issue of voltage security and small signal stability, which may lead to the system being forced to operate way below its rated capacity. The impact of renewable technology such as wind and other technologies are likely to further strain existing power networks and infrastructure, hence, likely to adversely affect voltage stability of the power network. The intermittency associated with these sources could also adversely affect on the damping of the system’s oscillatory modes. The work presented in this thesis develops techniques for identifying which controls are effective to improve voltage security margins. Using distributed series impedance, a device that can either increase or reduce line impedance, and margin sensitivity, it is shown that voltage stability margin can be effectively enhanced. Validation is performed on a 39 bus system following a major line outage contingency. Ways of improving the accuracy of margin sensitivity with respect to various controls are presented. Techniques for designing controllers to improve system mode damping have been developed. Unlike techniques using predominately state-space method, these which utilise polynomial methods, yield robust controller of low order and whose structure can be pre-specified. Three techniques are presented. The first uses Kharitonov’s theorem and results in bilinear matrix inequality (BMI) stability conditions. The second uses the theory of positive polynomials which results in linear matrix inequality (LMI) conditions for stability. The last uses conic programming to the controller design problem as a two part problem, first involving phase compensation design, then gain tuning. The effectiveness of the techniques is validated by designing controller for an 68 bus test system model.
Issue Date: Jun-2012
Date Awarded: Jul-2012
URI: http://hdl.handle.net/10044/1/9850
DOI: https://doi.org/10.25560/9850
Supervisor: Pal, Bikash
Sponsor/Funder: Engineering and Physical Sciences Research Council ; Beit Trust
Department: Electrical and Electronic Engineering
Publisher: Imperial College London
Qualification Level: Doctoral
Qualification Name: Doctor of Philosophy (PhD)
Appears in Collections:Electrical and Electronic Engineering PhD theses



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