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Bounding Variable Values and Round-Off Effects Using Handelman Representations

Title: Bounding Variable Values and Round-Off Effects Using Handelman Representations
Authors: Boland, D
Constantinides, GA
Item Type: Journal Article
Issue Date: 1-Nov-2011
URI: http://hdl.handle.net/10044/1/15305
DOI: http://dx.doi.org/10.1109/TCAD.2011.2161307
ISSN: 0278-0070
Publisher: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Start Page: 1691
End Page: 1704
Journal / Book Title: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Volume: 30
Issue: 11
Copyright Statement: © 2011 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Publication Status: Published
Appears in Collections:Electrical and Electronic Engineering