| Issue Date | Title | Author(s) |
| 6-Dec-2018 | Accelerating database systems using FPGAs: A survey | Papaphilippou, P; Luk, W; , et al |
| 7-Nov-2020 | Accelerating the merge phase of sort-merge join | Papaphilippou, P; Pirk, H; Luk, W; , et al |
| 13-Oct-2020 | An adaptable high-throughput FPGA merge sorter for accelerating database analytics | Papaphilippou, P; Brooks, C; Luk, W; , et al |
| 12-Oct-2021 | Demonstrating custom SIMD instruction development for a RISC-V softcore | Papaphilippou, P; Kelly, PHJ; Luk, W; , et al |
| 17-Jun-2021 | Extending the RISC-V ISA for exploring advanced reconfigurable SIMD instructions | Papaphilippou, P; Kelly, PHJ; Luk, W; |
| 20-Jun-2019 | FLiMS: fast lightweight merge sorter | Papaphilippou, P; Brooks, C; Luk, W; , et al |
| 23-Feb-2020 | High-performance FPGA network switch architecture | Papaphilippou, P; Meng, J; Luk, W; , et al |
| Mar-2022 | Hipernetch: high-performance FPGA network switch | Papaphilippou, P; Meng, J; Gebara, N; Luk, W; , et al |
| 12-Oct-2021 | Simodense: a RISC-V softcore optimised for exploring custom SIMD instructions | Papaphilippou, P; Kelly, PHJ; Luk, W; , et al |