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Simodense: a RISC-V softcore optimised for exploring custom SIMD instructions
| File | Description | Size | Format | |
|---|---|---|---|---|
 fpl21simodense.pdf | Accepted version | 282.94 kB | Adobe PDF | View/Open |
| Title: | Simodense: a RISC-V softcore optimised for exploring custom SIMD instructions |
| Authors: | Papaphilippou, P Kelly, PHJ Luk, W |
| Item Type: | Conference Paper |
| Abstract: | Simodense is a high-performance open-source RISC-V (RV32IM) softcore, optimised for exploring custom SIMD instructions. In order to maximise SIMD instruction performance, the design’s memory system is optimised for streaming bandwidth, such as very wide blocks for the last-level cache. The approach is demonstrated on example memory-intensive applications with custom instructions. This paper also provides insights on the effectiveness of adding FPGA resources in general purpose processors in the form of reconfigurable SIMD instructions. |
| Issue Date: | 12-Oct-2021 |
| Date of Acceptance: | 14-May-2021 |
| URI: | http://hdl.handle.net/10044/1/90081 |
| DOI: | 10.1109/FPL53798.2021.00082 |
| Publisher: | IEEE |
| Start Page: | 391 |
| End Page: | 397 |
| Journal / Book Title: | FPL2021. The International Conference on Field-Programmable Logic and Applications (FPL) |
| Copyright Statement: | © 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. |
| Sponsor/Funder: | Dunnhumby Limited Engineering & Physical Science Research Council (E Engineering & Physical Science Research Council (EPSRC) Commission of the European Communities |
| Funder's Grant Number: | PO: 250130012887 516075101 (EP/N031768/1) EP/P010040/1 671653 |
| Conference Name: | FPL2021. The International Conference on Field-Programmable Logic and Applications (FPL) |
| Keywords: | Science & Technology Technology Computer Science, Hardware & Architecture Computer Science, Software Engineering Computer Science, Theory & Methods Engineering, Electrical & Electronic Computer Science Engineering FPGA RISC-V softcore SIMD cache hierarchy custom instructions streaming big data sorting prefix scan FPGAs RISC-V softcore cache hierarchy SIMD custom instructions streaming big data sorting prefix scan |
| Publication Status: | Published |
| Start Date: | 2021-08-30 |
| Finish Date: | 2021-09-03 |
| Conference Place: | Dresden, Germany (virtually) |
| Online Publication Date: | 2021-10-12 |
| Appears in Collections: | Computing Faculty of Engineering |