Accelerating Reconfigurable Financial Computing

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Title: Accelerating Reconfigurable Financial Computing
Author(s): Tse, Hong Tak (Anson)
Item Type: Thesis or dissertation
Abstract: This thesis proposes novel approaches to the design, optimisation, and management of reconfigurable computer accelerators for financial computing. There are three contributions. First, we propose novel reconfigurable designs for derivative pricing using both Monte-Carlo and quadrature methods. Such designs involve exploring techniques such as control variate optimisation for Monte-Carlo, and multi-dimensional analysis for quadrature methods. Significant speedups and energy savings are achieved using our Field-Programmable Gate Array (FPGA) designs over both Central Processing Unit (CPU) and Graphical Processing Unit (GPU) designs. Second, we propose a framework for distributing computing tasks on multi-accelerator heterogeneous clusters. In this framework, different computational devices including FPGAs, GPUs and CPUs work collaboratively on the same financial problem based on a dynamic scheduling policy. The trade-off in speed and in energy consumption of different accelerator allocations is investigated. Third, we propose a mixed precision methodology for optimising Monte-Carlo designs, and a reduced precision methodology for optimising quadrature designs. These methodologies enable us to optimise throughput of reconfigurable designs by using datapaths with minimised precision, while maintaining the same accuracy of the results as in the original designs.
Publication Date: Jan-2012
Date Awarded: Apr-2012
URI: http://hdl.handle.net/10044/1/9588
Advisor: Luk, Wayne
Thomas, David
Sponsor/Funder: Engineering and Physical Sciences Research Council ; European Commission ; HiPEAC ; Maxeler Technologies (Firm) ; Celoxica (Firm) ; Xilinx (Firm)
Department: Computing
Publisher: Imperial College London
Qualification Level: Doctoral
Qualification Name: Doctor of Philosophy (PhD)
Appears in Collections:Computing PhD theses



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