A charge-based ultra-low power continuous-time ADC for data driven neural spike processing

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Title: A charge-based ultra-low power continuous-time ADC for data driven neural spike processing
Authors: Maslik, M
Liu, Y
Lande, TS
Constandinou, TG
Item Type: Conference Paper
Abstract: The paper presents a novel topology of a continuous-time analogue-to-digital converter (CT-ADC) featuring ultra-low static power consumption, activity-dependent dynamic consumption, and a compact footprint. This is achieved by utilising a novel charge-packet based threshold generation method, that alleviates the requirement for a conventional feedback DAC. The circuit has a static power consumption of 3.75uW, with dynamic energy of 1.39pJ/conversion level. This type of converter is thus particularly well-suited for biosignals that are generally sparse in nature. The circuit has been optimised for neural spike recording by capturing a 3kHz bandwidth with 8-bit resolution. For a typical extracellular neural recording the average power consumption is in the order of ~4uW. The circuit has been implemented in a commercially available 0.35um CMOS technology with core occupying a footprint of 0.12 sq.mm
Issue Date: 28-May-2017
Date of Acceptance: 17-Feb-2017
URI: http://hdl.handle.net/10044/1/46112
Publisher: IEEE
Start Page: 1420
End Page: 1423
Copyright Statement: This paper is embargoed until publication
Sponsor/Funder: Wellcome Trust
Engineering & Physical Science Research Council (EPSRC)
Funder's Grant Number: BH134389
Conference Name: IEEE International Symposium on Circuits & Systems (ISCAS)
Publication Status: Accepted
Start Date: 2017-05-28
Finish Date: 2017-05-31
Conference Place: Baltimore, MD (USA)
Embargo Date: publication subject to indefinite embargo
Appears in Collections:Faculty of Engineering
Electrical and Electronic Engineering

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