A 2.7uW/Mips, 0.88GOPS/mm^2 Distributed Processor for Implantable Brain Machine Interfaces

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Title: A 2.7uW/Mips, 0.88GOPS/mm^2 Distributed Processor for Implantable Brain Machine Interfaces
Author(s): Leene, L
Constandinou, TG
Item Type: Conference Paper
Abstract: This paper presents a scalable architecture in 0.18u m CMOS for implantable brain machine interfaces (BMI) that enables micro controller flexibility for data analysis at the sensor interface. By introducing more generic computational capabilities the system is capable of high level adaptive function to potentially improve the long term efficacy of invasive implants. This topology features a compact ultra low power distributed processor that supports 64-channel neural recording system on chip (SOC) with a computational efficiency of 2.7uW/MIPS with a total chip area of 1.37mm2. This configuration executes 1024 instructions on each core at 20MHz to consolidate full spectrum high precision recordings from 4 analogue channels for filtering, spike detection, and feature extraction in the digital domain.
Publication Date: 26-Jan-2017
Date of Acceptance: 10-Aug-2016
URI: http://hdl.handle.net/10044/1/40782
DOI: https://dx.doi.org/10.1109/BioCAS.2016.7833806
Publisher: IEEE
Start Page: 360
End Page: 363
Copyright Statement: © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Sponsor/Funder: Engineering & Physical Science Research Council (EPSRC)
Engineering & Physical Science Research Council (E
Engineering & Physical Science Research Council (EPSRC)
Funder's Grant Number: EP/K015060/1
RES/0560/7386 & EFXD12018
EP/M020975/1
Conference Name: IEEE Biomedical Circuits and Systems (BioCAS) Conference
Keywords: Science & Technology
Technology
Computer Science, Information Systems
Engineering, Biomedical
Engineering, Electrical & Electronic
Computer Science
Engineering
ARCHITECTURE
Publication Status: Published
Start Date: 2016-10-17
Finish Date: 2016-10-19
Conference Place: Shanghai, China
Appears in Collections:Faculty of Engineering
Electrical and Electronic Engineering



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