Knowledge is Power: Module-level Sensing for Runtime Optimisation

File Description SizeFormat 
fpga16.pdfAccepted version109.67 kBAdobe PDFView/Open
Title: Knowledge is Power: Module-level Sensing for Runtime Optimisation
Authors: Davis, JJ
Hung, E
Levine, J
Stott, E
Cheung, PYK
Constantinides, GA
Item Type: Conference Paper
Issue Date: 21-Feb-2016
Date of Acceptance: 8-Nov-2015
URI: http://hdl.handle.net/10044/1/31179
DOI: http://dx.doi.org/10.1145/2847263.2847316
ISBN: 978-1-4503-3856-1
Publisher: ACM
Start Page: 276
End Page: 276
Journal / Book Title: FPGA '16 Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Copyright Statement: © ACM, 2016. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in FPGA '16 Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays http://dx.doi.org/10.1145/2847263.2847316
Sponsor/Funder: Engineering & Physical Science Research Council (EPSRC)
Engineering & Physical Science Research Council (E
Royal Academy Of Engineering
Imagination Technologies Ltd
Funder's Grant Number: EP/I020357/1
11908 (EP/K034448/1)
Prof Constantinides Chair
Prof Constantinides Chair
Conference Name: ACM/SIGDA International Symposium on Field-programmable Gate Arrays (FPGA)
Publication Status: Published
Start Date: 2016-02-21
Finish Date: 2016-02-23
Conference Place: Monterey, California USA
Appears in Collections:Faculty of Engineering
Electrical and Electronic Engineering



Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

Creative Commonsx