Continuous-time micropower interface for neural recording applications

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Title: Continuous-time micropower interface for neural recording applications
Authors: Elia, M
Leene, L
Constandinou, TG
Item Type: Conference Paper
Abstract: This paper presents a novel amplifier architecture intended for low power neural recording applications. By using continuous-time signal representation, the proposed topology predominantly leverages digital topologies taking advantage of efficient techniques used in time domain systems. This includes higher order feedback dynamics that allow direct analogue signal quantization and near ideal integrator structures for noise shaping. The system implemented in 0.18 μ m standard CMOS demonstrates the capability for low noise instrumentation with a bandwidth of 6 kHz and highly linear full dynamic range. Simulation results indicate 1.145 μW budget from 0.5 V supply voltage with an input referred thermal noise of 7.7 μVrms.
Issue Date: 23-May-2016
Date of Acceptance: 10-Jan-2016
Publisher: IEEE
Start Page: 534
End Page: 637
Volume: 1
Copyright Statement: © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Sponsor/Funder: Engineering & Physical Science Research Council (EPSRC)
Engineering & Physical Science Research Council (EPSRC)
Funder's Grant Number: EP/K015060/1
Conference Name: IEEE International Symposium on Circuits and Systems (ISCAS)
Publication Status: Published
Start Date: 2016-05-22
Finish Date: 2016-05-25
Conference Place: Montreal, Canada
Appears in Collections:Faculty of Engineering
Electrical and Electronic Engineering

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