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High capacitance silicon nanowire array electrodes
File | Description | Size | Format | |
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Shougee-A-2018-PhD-Thesis.pdf | Thesis | 5.75 MB | Adobe PDF | View/Open |
Title: | High capacitance silicon nanowire array electrodes |
Authors: | Shougee, Abdurrahman |
Item Type: | Thesis or dissertation |
Abstract: | The interest in the development of improved, alternative and application-specific electrical energy storage solutions presents the opportunity for Si-based device with the functionality of electrochemical capacitors (ECs). Metal-assisted chemical etching (MACE) provides a low temperature and low-cost method of obtaining a high-density array of high aspect ratio silicon nanowires. The high surface area of the silicon nanowire arrays (SiNWA) is utilised to develop a high capacitance electrode, in conjunction with an ionic liquid (IL) electrolyte giving low volatility, high thermal stability, and high chemical stability enabling a higher operating voltage. High silicon reactivity necessitates passivation of the Si surface. A low temperature (120 °C) wet oxidation process provides a highly dense, ultra-thin (~1.4 nm) protective layer that extends the operating voltage and yields a high energy and power density, bringing the SiNWA electrode within the range of ECs. An alternative coating of metal oxide (TiO2) provides further performance improvement, and with energy and power densities of 0.9 and Wh·kg-1 and 2228 W·kg-1 respectively, places the developed SiNWA electrode towards the frontier of EC devices, as per the Ragone plot. Intermittent presence of apparent faradaic peaks observable on the cyclic voltammetry (CV) plots of SiNWA electrodes was analysed and attributed to the presence of deep level traps (DLTs) as a result of residual Ag from the MACE process. Multiple post-etch doping steps to degenerately dope the surface – pinning the Fermi level below the Si valence band – were found to mitigate the effect of the DLTs, improving the capacitive character and cycling stability of the electrodes. |
Content Version: | Open Access |
Issue Date: | Nov-2017 |
Date Awarded: | Apr-2018 |
URI: | http://hdl.handle.net/10044/1/59137 |
DOI: | https://doi.org/10.25560/59137 |
Supervisor: | Fobelets, Kristel Albrecht, Tim |
Sponsor/Funder: | Imperial College London |
Department: | Electrical and Electronic Engineering |
Publisher: | Imperial College London |
Qualification Level: | Doctoral |
Qualification Name: | Doctor of Philosophy (PhD) |
Appears in Collections: | Electrical and Electronic Engineering PhD theses |