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A domain specific language for accelerated multilevel Monte Carlo simulations
File | Description | Size | Format | |
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asap16bl.pdf | Accepted version | 799.77 kB | Adobe PDF | View/Open |
Title: | A domain specific language for accelerated multilevel Monte Carlo simulations |
Authors: | Lindsey, B Leslie, M Luk, W |
Item Type: | Conference Paper |
Abstract: | Monte Carlo simulations are used to tackle a wide range of exciting and complex problems, such as option pricing and biophotonic modelling. Since Monte Carlo simulations are both computationally expensive and highly parallelizable, they are ideally suited for acceleration through GPUs and FPGAs. Alongside these accelerators, Multilevel Monte Carlo techniques can be harnessed to further hasten simulations. However, researchers and application developers must invest a great deal of effort to design, optimise and test such Monte Carlo simulations. Furthermore, these models often have to be rewritten from scratch to target new hardware accelerators. This paper presents Neb, a Domain Specific Language for describing and generating Multilevel Monte Carlo simulations for a variety of hardware architectures. Neb compiles equations written in LATEX to C++, OpenCL or Maxeler's MaxJ language, allowing acceleration through GPUs or FPGAs. Neb can be used to solve stochastic equations or to generate paths for analysis with other tools. To evaluate the performance of Neb, a variety of financial models are executed on CPUs, GPUs and FPGAs, demonstrating peak acceleration of 3.7 times with FPGAs in 40nm transistor technology, and 14.4 times with GPUs in 28nm transistor technology. Furthermore, the energy efficiency of these accelerators is compared, revealing FPGAs to be 8.73 times and GPUs 2.52 times more efficient than CPUs. |
Issue Date: | 1-Dec-2016 |
Date of Acceptance: | 6-Jul-2016 |
URI: | http://hdl.handle.net/10044/1/50988 |
DOI: | https://dx.doi.org/10.1109/ASAP.2016.7760778 |
ISSN: | 1063-6862 |
Publisher: | IEEE |
Start Page: | 99 |
End Page: | 106 |
Journal / Book Title: | Application-specific Systems, Architectures and Processors (ASAP), 2016 IEEE 27th International Conference on |
Copyright Statement: | © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. |
Sponsor/Funder: | Engineering & Physical Science Research Council (E Commission of the European Communities Engineering & Physical Science Research Council (E Engineering & Physical Science Research Council (EPSRC) |
Funder's Grant Number: | PO 1553380 671653 516075101 (EP/N031768/1) EP/P010040/1 |
Conference Name: | 27th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) |
Keywords: | Science & Technology Technology Computer Science, Hardware & Architecture Engineering, Electrical & Electronic Computer Science Engineering |
Publication Status: | Published |
Start Date: | 2016-07-06 |
Finish Date: | 2016-07-08 |
Conference Place: | Imperial Coll London, London, ENGLAND |
Appears in Collections: | Computing Faculty of Engineering |