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Results 1-10 of 26
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Issue DateTitleAuthor(s)
18-Aug-2016KAPow: A System Identification Approach to Online Per-Module Power Estimation in FPGA DesignsHung, E; Davis, JJ; Levine, JM; Stott, EA; Cheung, PYK, et al
4-Sep-2017STRIPE: signal selection for runtime power estimationDavis, J; Levine, J; Stott, E; Hung, E; Cheung, P, et al
28-Oct-2018Run Fast When You Can: Loop Pipelining with Uncertain and Non-uniform Memory DependenciesLiu, J; Wickerson, J; Bayliss, S; Constantinides, GA; Engineering & Physical Science Research Council (E, et al
27-Aug-2018An efficient FPGA-based axis-aligned box tool for embedded computer graphicsChatzianastasiou, G; Constantinides, GA; Royal Academy Of Engineering; Imagination Technologies Ltd
21-Feb-2016Knowledge is Power: Module-level Sensing for Runtime OptimisationDavis, JJ; Hung, E; Levine, J; Stott, E; Cheung, PYK, et al
22-Feb-2017Hardware synthesis of weakly consistent C concurrencyRamanathan, N; Fleming, S; Wickerson, J; Constantinides, GA; Engineering & Physical Science Research Council (EPSRC), et al
7-Sep-2010A Warm-start Interior-point Method for Predictive ControlShahzad, A; Kerrigan, EC; Constantinides, GA
7-Sep-2010Quantization in Control Systems and Forward Error Analysis of Iterative Numerical AlgorithmsHasan, A; Kerrigan, EC; Constantinides, GA
11-Dec-2017ARCHITECT: Arbitrary-precision Constant-hardware Iterative ComputeLi, H; Davis, JJ; Wickerson, JP; Constantinides, GA; Engineering & Physical Science Research Council (E, et al
9-Jan-2017Multi-objective Co-design for Model Predictive Control with an FPGAKhusainov, B; Kerrigan, EC; Constantinides, GA; Engineering & Physical Science Research Council (EPSRC); Commission of the European Communities, et al