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ARC 2014: a multidimensional FPGA-based parallel DBSCAN architecture
| File | Description | Size | Format | |
|---|---|---|---|---|
 A Multi-Dimensional FPGA-Based Parallel DBSCAN TRETS.pdf | Accepted version | 1.65 MB | Adobe PDF | View/Open |
| Title: | ARC 2014: a multidimensional FPGA-based parallel DBSCAN architecture |
| Authors: | Scicluna, N Bouganis, C-S |
| Item Type: | Journal Article |
| Issue Date: | 30-Nov-2015 |
| Date of Acceptance: | 30-Nov-2015 |
| URI: | http://hdl.handle.net/10044/1/32909 |
| DOI: | http://dx.doi.org/10.1145/2724722 |
| ISSN: | 1936-7414 |
| Publisher: | Association for Computing Machinery (ACM) |
| Journal / Book Title: | ACM Transactions on Reconfigurable Technology and Systems |
| Volume: | 9 |
| Issue: | 1 |
| Copyright Statement: | © The Author(s) 2015. This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in ACM Transactions on Reconfigurable Technology and Systems, http://dx.doi.org/10.1145/2724722 |
| Keywords: | Science & Technology Technology Computer Science, Hardware & Architecture Computer Science Design Algorithms Performance Clustering DBSCAN FPGA parallel hardware architectures ALGORITHM 1006 Computer Hardware |
| Publication Status: | Published |
| Article Number: | 2 |
| Appears in Collections: | Electrical and Electronic Engineering Faculty of Engineering |