Passive selectorless memristive structure with one capacitor-one memristor

Abstract

Memristor memory has garnered more interest as a potential future non-volatile memory. One access transistor and one memristor (1T1R) cell structure can be utilized to eliminate the issue of sneak path current in crossbar-structured memristor memories. However, it has lower switching speed and high-power consumption. In this paper, a novel passive selectorless structure cell has been studied. One capacitor-One Memristor (1C1R) structure is proposed as a passive access device that can be controlled by the applied signal width. The 1C1R successfully writes and reads 1-bit information with two resistance value: 3.38MΩ as bit 0, and 10.07KΩ as a bit 1. 1C1R topology is proposed as a promising structure that has lower power consumption and faster switching speed compared to 1T1R. In addition, this work addresses the readout technique with 1C1R structure. The RRAM is implemented by SkyWater Verilog-A model.