A variation-aware CMOS platform for multi-level memristor characterisation
File(s)
Accepted version
Author(s)
Xie, Lijie
Feng, Peilong
Mifsud, Andrea
Nassibi, Amir
Papavassiliou, Christos
Type
Conference Paper
Abstract
Memristors could be potentially used in both multi-bit data storage and analogue computation, thanks to their programmable resistance. However, there are three common practical challenges to programme memristors to multiple resistive levels. First, the programmed resistance is unstable due to the device's intrinsic randomness and relaxation. Second, the memristor's transient resistive response to external stimuli is stochastic. Third, programming is unachievable if the target level is beyond the memristor's operational region. To overcome these challenges, this work proposes a novel characterisation methodology, which could implement multi-level memristor programming by experimentally identifying the memristor's multi-level capability and then determining the corresponding resistance ranges to accommodate its non-idealities. To automate the proposed methodology, a mixed-signal CMOS system is proposed. It mitigates device variations by providing flexibility for reconfiguring pulsing schemes. Furthermore, it provides up to 4.9V voltage pulses and enhanced reading accuracy for a wide-range resistive load (2kΩ to 5MΩ).
Date Issued
2024-08-06
Date Acceptance
2024-06-01
Citation
2024 13th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2024
ISBN
979-8-3503-8543-4
ISSN
2993-4443
Publisher
IEEE
Journal / Book Title
2024 13th International Conference on Modern Circuits and Systems Technologies (MOCAST)
Copyright Statement
Copyright © 2024 IEEE. This is the author’s accepted manuscript made available under a CC-BY licence in accordance with Imperial’s Research Publications Open Access policy (www.imperial.ac.uk/oa-policy)
License URL
Source
13th International Conference on Modern Circuits and Systems Technologies (MOCAST)
Subjects
CELL
characterisation
closed-loop
Engineering
Engineering, Electrical & Electronic
memristor
multi-level programming
SCHEME
Science & Technology
Technology
Publication Status
Published
Start Date
2024-06-26
Finish Date
2024-06-28
Coverage Spatial
Sofia, Bulgaria