Hardware realisation of nonlinear dynamical systems for and from biology
File(s)
Author(s)
Soleimani, Hamid
Type
Thesis or dissertation
Abstract
The focus of this thesis is on the applications of nonlinear dynamical systems in bioengineering which are mainly used in large-scale and generally categorised into two groups: (1) dynamical systems from biology (2) dynamical systems for biology. The mathematical models describing the dynamical systems used in the above systems can be simulated with the use of powerful software such as MATLAB, however, for large-scale simulations software begins to collapse. Besides, computer-based simulations are not always suitable for interfacing with biological/physical systems where continuous monitoring with low power and area consumption might be required. To alleviate these issues, a few novel hardware techniques for both aforementioned groups are proposed and their hardware results compared and validated by software simulations.
Under group (1), a compact and fully reconfigurable digital hardware model capable of mimicking 1-D, 2-D and 3-D nonlinear dynamical systems in real-time and large-scale is presented. Results, and theoretical analysis confirm that the proposed model can mimic the biological behaviour with considerably low hardware overhead and is, on average, ~83 times faster than the CPU version. The proposed model has been also fabricated in the AMS 0.35 um technology capable of emulating slow intracellular calcium dynamics. The fabricated chip occupies an area of 1.5 mm^2 and consumes 18.93 nW for each calcium unit from a power supply of 3.3 V.
In addition, under the same group, a novel analog circuit supporting a systematic synthesis procedure of log-domain and strong inversion circuits capable of computing bilateral fast/slow dynamical systems is proposed. The application of the method is demonstrated by synthesising four different case studies. The validity of our approach is verified by nominal and Monte Carlo simulated results with realistic process parameters from the AMS 0.35 um technology. The resulting circuits exhibit various bifurcation phenomena, time-domain responses in good agreement with their mathematical counterparts.
Under group (2), a flexible and efficient hardware classifier for biomedical time-series classification is proposed. In this classifier, throughput is traded off with hardware complexity and cost using resource sharing techniques. Results confirm that the proposed hardware can accurately classify surface EMG and heart time-series data with low area and power consumption. Most notably, our classifier reaches 1.3x higher GOPs/Slice than similar state of the art FPGA-based accelerators.
Under group (1), a compact and fully reconfigurable digital hardware model capable of mimicking 1-D, 2-D and 3-D nonlinear dynamical systems in real-time and large-scale is presented. Results, and theoretical analysis confirm that the proposed model can mimic the biological behaviour with considerably low hardware overhead and is, on average, ~83 times faster than the CPU version. The proposed model has been also fabricated in the AMS 0.35 um technology capable of emulating slow intracellular calcium dynamics. The fabricated chip occupies an area of 1.5 mm^2 and consumes 18.93 nW for each calcium unit from a power supply of 3.3 V.
In addition, under the same group, a novel analog circuit supporting a systematic synthesis procedure of log-domain and strong inversion circuits capable of computing bilateral fast/slow dynamical systems is proposed. The application of the method is demonstrated by synthesising four different case studies. The validity of our approach is verified by nominal and Monte Carlo simulated results with realistic process parameters from the AMS 0.35 um technology. The resulting circuits exhibit various bifurcation phenomena, time-domain responses in good agreement with their mathematical counterparts.
Under group (2), a flexible and efficient hardware classifier for biomedical time-series classification is proposed. In this classifier, throughput is traded off with hardware complexity and cost using resource sharing techniques. Results confirm that the proposed hardware can accurately classify surface EMG and heart time-series data with low area and power consumption. Most notably, our classifier reaches 1.3x higher GOPs/Slice than similar state of the art FPGA-based accelerators.
Version
Open Access
Date Issued
2019-02
Date Awarded
2019-06
Copyright Statement
Creative Commons Attribution NonCommercial No Derivatives Licence
Advisor
Drakakis, Emmanuel M.
Sponsor
Kings College London
Publisher Department
Bioengineering
Publisher Institution
Imperial College London
Qualification Level
Doctoral
Qualification Name
Doctor of Philosophy (PhD)