Continuous-Time Micropower Interface for Neural Recording Applications
File(s)2016_ISCAS_CT_FrontEnd.pdf (396.41 KB)
Accepted version
Author(s)
Elia, M
Leene, L
Constandinou, TG
Type
Conference Paper
Abstract
This paper presents a novel amplifier architecture
intended for low power neural recording applications. By using
continuous-time signal representation, the proposed topology
predominantly leverages digital topologies taking advantage of
efficient techniques used in time domain systems. This includes
higher order feedback dynamics that allow direct analogue
signal quantization and near ideal integrator structures for noise
shaping. The system implemented in 0.18 μ m standard CMOS
demonstrates the capability for low noise instrumentation with
a bandwidth of 6 kHz and highly linear full dynamic range.
Simulation results indicate 1.145 μW budget from 0.5 V supply
voltage with an input referred thermal noise of 7.7 μVrms.
intended for low power neural recording applications. By using
continuous-time signal representation, the proposed topology
predominantly leverages digital topologies taking advantage of
efficient techniques used in time domain systems. This includes
higher order feedback dynamics that allow direct analogue
signal quantization and near ideal integrator structures for noise
shaping. The system implemented in 0.18 μ m standard CMOS
demonstrates the capability for low noise instrumentation with
a bandwidth of 6 kHz and highly linear full dynamic range.
Simulation results indicate 1.145 μW budget from 0.5 V supply
voltage with an input referred thermal noise of 7.7 μVrms.
Date Issued
2016-05-23
Date Acceptance
2016-01-10
Citation
2016, 1, pp.534-637
Publisher
IEEE
Start Page
534
End Page
637
Volume
1
Copyright Statement
© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Sponsor
Engineering & Physical Science Research Council (EPSRC)
Engineering & Physical Science Research Council (EPSRC)
Grant Number
EP/K015060/1
EP/M020975/1
Source
IEEE International Symposium on Circuits and Systems (ISCAS)
Publication Status
Published
Start Date
2016-05-22
Finish Date
2016-05-25
Coverage Spatial
Montreal, Canada