Advancing full-stack acceleration for Schrödinger-style quantum simulation
File(s)
Accepted version
Author(s)
Type
Conference Paper
Abstract
Recent developments in quantum hardware, including the scaling of physical qubits and advanced quantum error correction techniques, have increased the number of reliable logical qubits. However, this progress has introduced new challenges for quantum algorithm developers. Limited access to physical quantum machines and the insufficient performance of classical quantum simulators for near-term scales (∼30 logical qubits) hinder the simulation and validation of quantum algorithms. To address this urgent need for improving simulation performance, we propose a novel end-to-end full-stack solution for Schr¨odinger-style simulation that jointly explores algorithm, software, and hardware optimizations. At the algorithmic level, by identifying the inefficiency in executing complex signed permutations and complex unitary permutation gates, we introduce index redirection and pre-compute merging that significantly reduce data movement and computational complexity. At the hardware level, we propose a reconfigurable dataflow architecture with adaptive memory scheduling and swapping optimizations. At the software level, an end-to-end toolchain is introduced to jointly explore both algorithmic and hardware optimizations. A comprehensive evaluation across a large suite of quantum circuits demonstrates that our work achieves a maximum speedup exceeding 50× over the GPU-based Qiskit baseline.
Date Issued
2026-03-04
Date Acceptance
2025-11-07
Citation
2026 IEEE International Symposium on High Performance Computer Architecture (HPCA), 2026
ISBN
979-8-3315-9302-5
ISSN
2378-203X
Publisher
IEEE
Journal / Book Title
2026 IEEE International Symposium on High Performance Computer Architecture (HPCA)
Copyright Statement
Copyright © 2026 The Author(s). This is the author’s accepted manuscript made available under a CC-BY licence in accordance with Imperial’s Research Publications Open Access policy (www.imperial.ac.uk/oa-policy)
License URL
Source
32nd IEEE International Symposium on High Performance Computer Architecture (HPCA) 2026
Publication Status
Published
Start Date
2026-01-31
Finish Date
2026-02-04
Coverage Spatial
Sydney, Australia
Date Publish Online
2026-03-04