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  4. Towards efficient convolutional neural network for domain-specific applications on FPGA
 
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Towards efficient convolutional neural network for domain-specific applications on FPGA
File(s)
fpl18rz_v6.pdf (793.23 KB)
Submitted version
Author(s)
Zhao, R
Ng, Ho-Cheung
Luk, Wayne
Niu, Xinyu
Type
Conference Paper
Abstract
FPGA becomes a popular technology for imple-
menting Convolutional Neural Network (CNN) in recent years.
Most CNN applications on FPGA are domain-specific, e.g.,
detecting objects from specific categories, in which commonly-
used CNN models pre-trained on general datasets may not be
efficient enough. This paper presents TuRF, an end-to-end CNN
acceleration framework to efficiently deploy domain-specific ap-
plications on FPGA by transfer learning that adapts pre-trained
models to specific domains, replacing standard convolution layers
with efficient convolution blocks, and applying layer fusion to
enhance hardware design performance. We evaluate TuRF by
deploying a pre-trained VGG-16 model for a domain-specific
image recognition task onto a Stratix V FPGA. Results show
that designs generated by TuRF achieve better performance than
prior methods for the original VGG-16 and ResNet-50 models,
while for the optimised VGG-16 model TuRF designs are more
accurate and easier to process.
Date Issued
2018-12-06
Date Acceptance
2018-05-21
Citation
2018
URI
http://hdl.handle.net/10044/1/62190
URL
https://ieeexplore.ieee.org/document/8533484
DOI
https://www.dx.doi.org/10.1109/FPL.2018.00033
Publisher
IEEE
Copyright Statement
© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Sponsor
Engineering & Physical Science Research Council (EPSRC)
Identifier
https://ieeexplore.ieee.org/document/8533484
Grant Number
EP/I012036/1
Source
28th International Conference on Field-Programmable Logic and Applications (FPL)
Subjects
Science & Technology
Technology
Computer Science, Hardware & Architecture
Computer Science, Software Engineering
Computer Science
Publication Status
Published
Start Date
2018-08-27
Finish Date
2018-08-31
Coverage Spatial
Dublin, Ireland
Date Publish Online
2018-12-06
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