This paper describes a new hardware-efficient
method and implementation for neural spike sorting based
on selection of a channel-specific near-optimal subset of fea-
tures given a larger predefined set. For each channel, real-
time classification is achieved using a simple decision matrix
that considers the features that provide the highest separability
determined through off-line training. A 32-channel system for on-
line feature extraction and classification has been implemented
in an ARM Cortex-M0+ processor. Measured results of the
hardware platform consumes 268

W per channel during spike
sorting (includes detection). The proposed method provides at
least x10 reduction in computational requirements compared to
literature, while achieving an average classification error of less
than 10% across wide range of datasets and noise levels.