Rapid development of gzip with MaxJ
File(s)
Accepted version
Author(s)
Voss, Nils
Becker, Tobias
Mencer, Oskar
Gaydadjiev, Georgi
Type
Conference Paper
Abstract
Design productivity is essential for high-performance application development involving accelerators. Low level hardware description languages such as Verilog and VHDL are widely used to design FPGA accelerators, however, they require significant expertise and considerable design efforts. Recent advances in high-level synthesis have brought forward tools that relieve the burden of FPGA application development but the achieved performance results can not approximate designs made using low-level languages. In this paper we compare different FPGA implementations of gzip. All of them implement the same system architecture using different languages. This allows us to compare Verilog, OpenCL and MaxJ design productivity. First, we illustrate several conceptional advantages of the MaxJ language and its platform over OpenCL. Next we show on the example of our gzip implementation how an engineer without previous MaxJ experience can quickly develop and optimize a real, complex application. The gzip design in MaxJ presented here took only one man-month to develop and achieved better performance than the related work created in Verilog and OpenCL.
Editor(s)
Wong, S
Beck, AC
Bertels, K
Carro, L
Date Issued
2017-03-31
Date Acceptance
2016-02-02
Citation
Lecture Notes in Computer Science, 2017, 10216, pp.60-71
ISBN
978-3-319-56257-5
ISSN
0302-9743
Publisher
Springer Verlag
Start Page
60
End Page
71
Journal / Book Title
Lecture Notes in Computer Science
Volume
10216
Copyright Statement
© Springer International Publishing AG 2017. The final publication is available at Springer via https://link.springer.com/chapter/10.1007%2F978-3-319-56258-2_6
Identifier
http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000426273100006&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=1ba7043ffcc86c417c072aa74d649202
Source
13th International Symposium on Applied Reconfigurable Computing (ARC)
Subjects
Science & Technology
Technology
Computer Science, Hardware & Architecture
Computer Science, Theory & Methods
Computer Science
DATA-COMPRESSION
Publication Status
Published
Start Date
2017-04-03
Finish Date
2017-04-07
Coverage Spatial
Delft, Netherlands
Date Publish Online
2017-03-31