Loop pipelining is widely adopted as a key optimization
method in high-level synthesis (HLS). However, when
complex memory dependencies appear in a loop, commercial
HLS tools are still not able to maximize pipeline performance.
In this paper, we leverage parametric polyhedral analysis to
reason about memory dependence patterns that are uncertain
(i.e., parameterised by an undetermined variable) and/or nonuniform
(i.e., varying between loop iterations). We develop an
automated source-to-source code transformation to split the
loop into pieces, which are then synthesised by Vivado HLS
as the hardware generation back-end. Our technique allows
generated loops to run with a minimal interval, automatically
inserting statically-determined parametric pipeline breaks at
those iterations violating dependencies. Our experiments on
seven representative benchmarks show that, compared to default
loop pipelining, our parametric loop splitting improves pipeline
performance by 4:3 in terms of clock cycles per iteration. The
optimized pipelines consume 2:0 as many LUTs, 1:8 as many
registers, and 1:1 as many DSP blocks. Hence the area-time
product is improved by nearly a factor of 2.