Fast word-level power models for synthesis of FPGA-based arithmetic
File(s)Fast word-level power models.pdf (2.64 MB)
Published version
Author(s)
Clarke, J A
Abdul Gaffar, A M
Constantinides, G A
Cheung, P Y K
Type
Conference Paper
Version
Published version
Date Issued
2006-04
Citation
Proc. IEEE International Symposium on Circuits and Systems, 2006, pp.1299-1302
ISBN
0-7803-9389-9
Source Title
IEEE International Symposium on Circuits and Systems
Start Page
1299
End Page
1302
Journal / Book Title
Proc. IEEE International Symposium on Circuits and Systems
Copyright Statement
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Source
IEEE International Symposium on Circuits and Systems