System designers typically use well-studied benchmarks to
evaluate and improve new architectures and compilers. We
design tomorrow's systems based on yesterday's applications.
In this paper we investigate an emerging application,
3D scene understanding, likely to be signi cant in the mobile
space in the near future. Until now, this application could
only run in real-time on desktop GPUs. In this work, we
examine how it can be mapped to power constrained embedded
systems. Key to our approach is the idea of incremental
co-design exploration, where optimization choices that concern
the domain layer are incrementally explored together
with low-level compiler and architecture choices. The goal
of this exploration is to reduce execution time while minimizing
power and meeting our quality of result objective.
As the design space is too large to exhaustively evaluate,
we use active learning based on a random forest predictor
to nd good designs. We show that our approach can, for
the rst time, achieve dense 3D mapping and tracking in the
real-time range within a 1W power budget on a popular embedded
device. This is a 4.8x execution time improvement
and a 2.8x power reduction compared to the state-of-the-art.