Class Φ resonant gate driver with waveform shaping for SiC-based VHF power conversion
File(s) Resonant_Gate_Driver_TPEL__Final_ (1).pdf (12.08 MB)
Accepted version
Author(s)
Wagle, Prateek
Nikiforidis, Ioannis
Mitcheson, Paul
Type
Journal Article
Abstract
Driving Silicon Carbide (SiC) MOSFETs at high frequencies presents significant challenges due to their high input gate capacitance and required voltage swing. In this paper we propose a design method for a Class Φ resonant gate driver topology, implemented on a SiC device in a 6.78MHz Class E inverter power stage. The topology is modelled using state-space analysis for performance optimisation and gate voltage profile shaping. Experimental results demonstrate significant advantages compared to conventional hard-switched half-bridge gate drivers, including lower gate driver power consumption and higher power device drain efficiency. Further optimisation of the magnetic components of the gate driver resulted in a further reduction both in size and power consumption, achieving an 8.6-fold reduction in gate driving power compared to the conventional half-bridge gate driver. Additionally, the experimental setup shows improved efficiency of the power stage which correlates to a 8.8 W (25.9%) reduction in loss in the power device when driven by the resonant gate driver.
Date Issued
2026-05-01
Date Acceptance
2025-12-11
Citation
IEEE transactions on power electronics, 2026, 41 (5), pp.8747-8765
ISSN
0885-8993
Publisher
Institute of Electrical and Electronics Engineers
Start Page
8747
End Page
8765
Journal / Book Title
IEEE transactions on power electronics
Volume
41
Issue
5
Copyright Statement
© 2025 IEEE. This is the author’s accepted manuscript made available under a CC-BY licence in accordance with Imperial’s Research Publications Open Access policy (www.imperial.ac.uk/oa-policy)
License URL
Publication Status
Published
Date Publish Online
2025-12-15
