Clockless Continuous-Time Neural Spike Sorting: Method, Implementation and Evaluation
File(s)
Accepted version
Author(s)
Liu, Y
Pereira, J
Constandinou, TG
Type
Conference Paper
Abstract
In this paper, we present a new method for neural
spike sorting based on Continuous Time (CT) signal processing.
A set of CT based features are proposed and extracted from
CT sampled pulses, and a complete event-driven spike sorting
algorithm that performs classification based on these features is
developed. Compared to conventional methods for spike sorting,
the hardware implementation of the proposed method does not
require any synchronisation clock for logic circuits, and thus
its power consumption depend solely on the spike activity. This
has been implemented using a variable quantisation step CT
analogue to digital converter (ADC) with custom digital logic
that is driven by level crossing events. Simulation results using
synthetic neural data shows a comparable accuracy compared
to template matching (TM) and Principle Components Analysis
(PCA) based discrete sampled classification.
spike sorting based on Continuous Time (CT) signal processing.
A set of CT based features are proposed and extracted from
CT sampled pulses, and a complete event-driven spike sorting
algorithm that performs classification based on these features is
developed. Compared to conventional methods for spike sorting,
the hardware implementation of the proposed method does not
require any synchronisation clock for logic circuits, and thus
its power consumption depend solely on the spike activity. This
has been implemented using a variable quantisation step CT
analogue to digital converter (ADC) with custom digital logic
that is driven by level crossing events. Simulation results using
synthetic neural data shows a comparable accuracy compared
to template matching (TM) and Principle Components Analysis
(PCA) based discrete sampled classification.
Date Issued
2016-05-23
Date Acceptance
2016-01-10
Citation
2016, 1, pp.538-541
Publisher
IEEE
Start Page
538
End Page
541
Volume
1
Copyright Statement
© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Sponsor
Engineering & Physical Science Research Council (EPSRC)
Engineering & Physical Science Research Council (EPSRC)
Engineering & Physical Science Research Council (EPSRC)
Grant Number
EP/I000569/1
EP/K015060/1
EP/M020975/1
Source
IEEE International Symposium on Circuits and Systems (ISCAS)
Publication Status
Published
Start Date
2016-05-22
Finish Date
2016-05-25
Coverage Spatial
Montreal, Canada