In high-level synthesis, scheduling is the process that determines
the start time of each operation in hardware. A hardware design can
be scheduled either at compile time (static), run time (dynamic), or
both. Recent research has shown that combining dynamic and static
scheduling can achieve high performance and small area. However,
there is still a challenge to determine which part to schedule statically and which part dynamically. An inappropriate choice can
lead to suboptimal design quality. This paper proposes a heuristicdriven approach to automatically determine ‘static islands’ – i.e.,
code regions that are amenable for static scheduling. Over a set of
benchmarks where our approach is applicable, we show that our
tool can achieve on average a 3.8-fold reduction in area combined
with a 13% performance boost through automatic identification and
synthesis of static islands from fully dynamically scheduled circuits.
The performance of the resulting hardware is close to optimum
(as determined by an exhaustive enumeration of all possible static
islands).