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  4. SLATE: managing heterogeneous cloud functions
 
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SLATE: managing heterogeneous cloud functions
File(s)
PID6493029.pdf (940.69 KB)
Accepted version
Author(s)
Vandebon, Jessica
Coutinho, Jose GF
Luk, Wayne
Nurvitadhi, Eriko
Naik, Mishali
Type
Conference Paper
Abstract
This paper presents SLATE, a fully-managed, heterogeneous Function-as-a-Service (FaaS) system for deploying serverless functions onto heterogeneous cloud infrastructures. We extend the traditional homogeneous FaaS execution model to support heterogeneous functions, automating and abstracting runtime management of heterogeneous compute resources in order to improve cloud tenant accessibility to specialised, accelerator resources, such as FPGAs and GPUs. In particular, we focus on the mechanisms required for heterogeneous scaling of deployed function instances to guarantee latency objectives while minimising cost. We develop a simulator to validate and evaluate our approach, considering case-study functions in three application domains: machine learning, bio-informatics, and physics. We incorporate empirically derived performance models for each function implementation targeting a hardware platform with combined computational capacity of 24 FPGAs and 12 CPU cores. Compared to homogeneous CPU and homogeneous FPGA functions, simulation results achieve respectively a cost improvement for non-uniform task traffic of up to 8.7 times and 1.7 times, while maintaining specified latency objectives.
Editor(s)
Hannig, F
Navaridas, J
Koch, D
Abdelhadi, A
Date Issued
2020-07-06
Date Acceptance
2020-05-20
Citation
2020 IEEE 31ST INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 2020), 2020, pp.141-148
URI
http://hdl.handle.net/10044/1/90514
URL
https://ieeexplore.ieee.org/document/9153229
DOI
https://www.dx.doi.org/10.1109/ASAP49362.2020.00032
ISSN
2160-0511
Publisher
IEEE COMPUTER SOC
Start Page
141
End Page
148
Journal / Book Title
2020 IEEE 31ST INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 2020)
Copyright Statement
© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Identifier
http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000618062800023&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=1ba7043ffcc86c417c072aa74d649202
Source
31st IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP)
Subjects
Science & Technology
Technology
Computer Science, Hardware & Architecture
Computer Science, Theory & Methods
Engineering, Electrical & Electronic
Computer Science
Engineering
Publication Status
Published
Start Date
2020-07-06
Finish Date
2020-07-08
Coverage Spatial
Univ Manchester, Dept Comp Sci, Manchester, ENGLAND
Date Publish Online
2020-07-31
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