Design flow for hybrid CMOS/memristor systems--Part II: circuit schematics and layout
File(s)
Author(s)
Type
Journal Article
Abstract
\normalsize The capability of in-memory computation, reconfigurability, low power operation as well as multistate operation of the memristive device deems them a suitable candidate for designing electronic circuits with a broad range of applications. Besides, the integrability of memristor with CMOS enables it to use in logic circuits too. In this work, we demonstrate with examples the design flow for memristor-based electronics, after the custom memristor model already being integrated and validated into our chosen Computer-Aided Design (CAD) tool to performing layout-versus-schematic and post-layout checks including the memristive device. We envisage that this step-by-step guide to introducing memristor into the standard integrated circuit design flow will be a useful reference document for both device developers who wish to benchmark their technologies and circuit designers who wish to experiment with memristive-enhanced systems.
Date Issued
2021-11-13
Date Acceptance
2021-10-15
Citation
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021, 68 (12), pp.4876-4888
ISSN
1549-8328
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Start Page
4876
End Page
4888
Journal / Book Title
IEEE Transactions on Circuits and Systems I: Regular Papers
Volume
68
Issue
12
Copyright Statement
© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Identifier
https://ieeexplore.ieee.org/document/9598180
Subjects
Electrical & Electronic Engineering
0906 Electrical and Electronic Engineering
Publication Status
Published
Date Publish Online
2021-11-13