Reconfigurable architecture for network flow analysis

Yusuf, S; Luk, W; Sloman, M; Dulay, N; Lupu, EC

doi:https://www.dx.doi.org/10.1109/TVLSI.2007.912115

File(s)

tvlsi08sy.pdf (634.05 KB)

Published version

Author(s)

Yusuf, S

Luk, W

Sloman, M

Dulay, N

Lupu, EC

Type

Journal Article

Date Issued

2008-01

Citation

IEEE Transactions on VLSI System, 2008, 16 (1), pp.57-65

URI

http://hdl.handle.net/10044/1/5911

URL

http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4407545&isnumber=4407531

DOI

https://www.dx.doi.org/10.1109/TVLSI.2007.912115

ISSN

1063-8210

Publisher

IEEE

Start Page

57

End Page

65

Journal / Book Title

IEEE Transactions on VLSI System

Volume

16

Issue

1

Copyright Statement

© 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

License URL

http://www.rioxx.net/licenses/all-rights-reserved

Source Volume Number

16