From Tensor Algebra to Hardware Accelerators: Generating Streaming Architectures for Solving Partial Differential Equations
File(s)asap18fr.pdf (309.68 KB)
Accepted version
Author(s)
Russell, FP
Targett, JS
Luk, W
Type
Conference Paper
Abstract
Hardware accelerators are attractive targets for running scientific simulations due to their power efficiency. Since, large software simulations can take person years to develop, it is often impractical to use hardware acceleration, which requires significantly more development effort and expertise than software development. We present the design and implementation of a proof-of-concept compiler toolchain which enables rapid prototyping of hardware finite difference solvers for partial differential equations, generated from a high-level domain specific language. Multiple fields, grid staggering and non-linear terms are supported. We demonstrate that our approach is practical by generating and evaluating hardware designs derived from the heat and simplified shallow water equations.
Date Issued
2018-08-27
Date Acceptance
2018-07-10
Citation
Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, 2018
ISBN
9781538674796
ISSN
1063-6862
Publisher
IEEE
Journal / Book Title
Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
Copyright Statement
© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Sponsor
Engineering & Physical Science Research Council (E
Commission of the European Communities
Engineering & Physical Science Research Council (E
Engineering & Physical Science Research Council (EPSRC)
Grant Number
PO 1977926
671653
516075101 (EP/N031768/1)
EP/P010040/1
Source
2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP)
Publication Status
Published
Start Date
2018-07-10
Finish Date
2018-07-12
Date Publish Online
2018-08-27