A 0.5V time-domain instrumentation circuit with clocked and unclocked ΔΣ operation
File(s)
Accepted version
Author(s)
Leene, L
Constandinou, TG
Type
Conference Paper
Abstract
This paper presents a time-domain instrumentation circuit with exceptional noise efficiency directed at using nanometre CMOS for next generation neural interfaces. Current efforts to realize closed loop neuromodulation and high fidelity BMI prosthetics rely extensively on digital processing which is
not well integrated with conventional analogue instrumentation. The proposed time-domain topology employs a differential ring oscillator that is put into feedback using a chopper stabilized low noise transconductor and capacitive feedback. This realization promises better digital integration by extensively using time encoded digital signals and seamlessly allows both clocked & unclocked ΔΣ behavior which is useful on-chip characterization
and interfacing with synchronous systems. A 0.5V instrumentation system is implemented using a 65nm TSMC technology to realize a highly compact footprint that is 0.006mm2 in size. Simulation results demonstrate an excess of 55 dB dynamic range with 3.5 Vrms input referred noise for the given 810nW total system power budget corresponding to an NEF of 1.64.
not well integrated with conventional analogue instrumentation. The proposed time-domain topology employs a differential ring oscillator that is put into feedback using a chopper stabilized low noise transconductor and capacitive feedback. This realization promises better digital integration by extensively using time encoded digital signals and seamlessly allows both clocked & unclocked ΔΣ behavior which is useful on-chip characterization
and interfacing with synchronous systems. A 0.5V instrumentation system is implemented using a 65nm TSMC technology to realize a highly compact footprint that is 0.006mm2 in size. Simulation results demonstrate an excess of 55 dB dynamic range with 3.5 Vrms input referred noise for the given 810nW total system power budget corresponding to an NEF of 1.64.
Date Issued
2017-09-28
Date Acceptance
2017-02-17
Citation
Circuits and Systems (ISCAS), 2017 IEEE International Symposium on, 2017, pp.2619-2622
ISSN
2379-447X
Publisher
IEEE
Start Page
2619
End Page
2622
Journal / Book Title
Circuits and Systems (ISCAS), 2017 IEEE International Symposium on
Copyright Statement
© 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Sponsor
Engineering & Physical Science Research Council (EPSRC)
Engineering & Physical Science Research Council (EPSRC)
Grant Number
EP/K015060/1
EP/M020975/1
Source
IEEE International Symposium on Circuits and Systems (ISCAS)
Publication Status
Published
Start Date
2017-05-28
Finish Date
2017-05-31
Coverage Spatial
Baltimore, MD (USA)