A statically and dynamically scalable soft SIMT processor
File(s)
Author(s)
Langhammer, Martin
Type
Thesis
Abstract
This goal of this project was to create an effective, high performance soft processor. A SIMT architecture aligns well with the parallel nature of the FPGA and also enables comparison with the most successful contemporary parallel processor, the GPU. To be effective, the soft SIMT processor must be small, fast, and efficient. The result of this work is a compact (an area ≈ 1% of a mid-range FPGA), high speed (771 MHz with an unconstrained compile), and performant (similar computational efficiency with contemporary GPUs) core.
The processor is both statically and dynamically scalable. Static scalability is enabled by many different architectural variants and features, which allow the core to use the FPGA resources effectively, and also optimize the processor for different workloads. The dynamic scalability can change the width and depth of the thread space on an instruction-by-instruction basis, which mitigates the main limitation of parallel processors mapped to the FPGA, which is memory bandwidth.
A number of soft GPUs have previously been published, but the large resource requirements and relatively modest performance make them uncompetitive for any real applications. In contrast, the processor in this project is intended to be used for embedded applications in contemporary FPGA designs. In addition to direct comparisons with earlier soft GPUs, the new SIMT core is also benchmarked against commercial GPUs for architectural efficiency and returns a similar effective FLOPs percentage.
The processor is both statically and dynamically scalable. Static scalability is enabled by many different architectural variants and features, which allow the core to use the FPGA resources effectively, and also optimize the processor for different workloads. The dynamic scalability can change the width and depth of the thread space on an instruction-by-instruction basis, which mitigates the main limitation of parallel processors mapped to the FPGA, which is memory bandwidth.
A number of soft GPUs have previously been published, but the large resource requirements and relatively modest performance make them uncompetitive for any real applications. In contrast, the processor in this project is intended to be used for embedded applications in contemporary FPGA designs. In addition to direct comparisons with earlier soft GPUs, the new SIMT core is also benchmarked against commercial GPUs for architectural efficiency and returns a similar effective FLOPs percentage.
Version
Open Access
Date Issued
2025-08-11
Date Awarded
01/12/2025
License URL
Advisor
Constantinides, George
Publisher Department
Department of Electrical and Electronic Engineering
Publisher Institution
Imperial College London
Qualification Level
Doctoral
Qualification Name
Doctor of Philosophy (PhD)