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  4. Digit Elision for Arbitrary-accuracy Iterative Computation
 
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Digit Elision for Arbitrary-accuracy Iterative Computation
File(s)
paper 28.pdf (360.02 KB)
Accepted version
Author(s)
Li, He
Davis, JJ
Wickerson, John
Constantinides, George
Type
Conference Paper
Abstract
Recently, a fixed compute-resource hardware architecture was proposed to enable the iterative solution of systems of linear equations to arbitrary accuracies. This technique, named ARCHITECT, achieves exact numeric computation by using online arithmetic to allow the refinement of results from earlier iterations over time, eschewing rounding error. ARCHITECT has a key drawback, however: often, many more digits than strictly necessary are generated, with this problem exacerbating the more accurate a solution is sought. In this paper, we infer the locations of these superfluous digits within stationary iterative calculations by exploiting online arithmetic’s digit dependencies and using forward error analysis. We demonstrate that their lack of computation is guaranteed not to affect the ability to reach a solution of any accuracy. Versus ARCHITECT, our illustrative hardware implementation achieves a geometric mean 20.1x speedup in the solution of a set of representative linear systems through the avoidance of redundant digit calculation. For the calculation of high-precision results, we also obtain an up-to 22.4x memory requirement reduction over the same architecture. Finally, we demonstrate that iterative solvers implemented following our proposals show superiority over conventional arithmetic implementations by virtue of their runtime-tunable precisions.
Date Issued
2018-09-17
Date Acceptance
2018-04-06
Citation
IEEE Symposium on Computer Arithmetic (ARITH) 2018, 2018, pp.107-114
URI
http://hdl.handle.net/10044/1/58750
URL
https://ieeexplore.ieee.org/document/8464691/
DOI
https://www.dx.doi.org/10.1109/ARITH.2018.8464691
ISBN
978-1-5386-2613-9
ISSN
2576-2265
Publisher
IEEE
Start Page
107
End Page
114
Journal / Book Title
IEEE Symposium on Computer Arithmetic (ARITH) 2018
Copyright Statement
© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Sponsor
Engineering & Physical Science Research Council (EPSRC)
Engineering & Physical Science Research Council (E
Imperial College London
Identifier
http://cas.ee.ic.ac.uk/people/gac1/pubs/HeARITH18.pdf
Grant Number
EP/P010040/1
11908 (EP/K034448/1)
Imperial College London
Source
IEEE Symposium on Computer Arithmetic (ARITH) 2018
Subjects
Science & Technology
Technology
Computer Science, Interdisciplinary Applications
Computer Science
Publication Status
Published
Start Date
2018-06-25
Finish Date
2018-06-27
Coverage Spatial
Amherst, MA, USA
Date Publish Online
2018-09-17
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