Chip-scale coils for millimeter-sized bio-implants
File(s)
Published version
Author(s)
Feng, P
Yeon, Pyungwoo
Cheng, Yuhua
Ghovanloo, Maysam
Constandinou, TG
Type
Journal Article
Abstract
Next generation implantable neural interfaces are targeting devices with mm-scale form factors that are freely floating and completely wireless. Scalability to more recording (or stimulation) channels will be achieved through distributing multiple devices, instead of the current approach that uses a single centralized implant wired to individual electrodes or arrays. In this way, challenges associated with tethers, micromotion and reliability of wiring is mitigated. This concept is now being applied to both central and peripheral nervous system interfaces. One key requirement, however, is to maximize SAR-constrained achievable wireless power transfer efficiency (PTE) of these inductive links with mm-sized receivers. Chip-scale coil structures for microsystem integration that can provide efficient near-field coupling are investigated. We develop near-optimal geometries for three specific coil structures: “in-CMOS”, “above-CMOS” (planar coil post-fabricated on a substrate) and “around-CMOS” (helical wirewound coil around substrate). We develop analytical and simulation models that have been validated in air and biological tissues by fabrications and experimentally measurements. Specifically, we prototype structures that are constrained to a 4mm x 4mm silicon substrate i.e. the planar in-/above-CMOS coils have outer diameter <4mm, whereas the around-CMOS coil has inner diameter of 4mm. The in-CMOS and above-CMOS coils have metal film thicknesses of 3μm aluminium and 25μm gold, respectively, whereas the around-CMOS coil is fabricated by winding a 25μm gold bonding-wire around the substrate. The measured quality factors (Q) of the mm-scale Rx coils are 10.5 @450.3MHz (in-CMOS), 24.61 @85MHz (above-CMOS), and 26.23 @283MHz (around-CMOS). Also, PTE of 2-coil links based on three types of chip-scale coils is measured in air and tissue environment to demonstrate tissue loss for bio-implants. The SAR-constrained maximum PTE are measured (together with resonant frequencies, in tissue) 1.64% @355.8MHz (in-CMOS), 2.09% @82.9MHz (above-CMOS), and 3.05% @318.8MHz (around-CMOS).
Date Issued
2018-10-01
Date Acceptance
2018-06-28
Citation
IEEE Transactions on Biomedical Circuits and Systems, 2018, 12 (5), pp.1088-1099
ISSN
1932-4545
Publisher
Institute of Electrical and Electronics Engineers
Start Page
1088
End Page
1099
Journal / Book Title
IEEE Transactions on Biomedical Circuits and Systems
Volume
12
Issue
5
Copyright Statement
© 2018 The Author(s). This work is licensed under a Creative Commons Attribution 3.0 License. For more information, see http://creativecommons.org/licenses/by/3.0/
License URL
Sponsor
Engineering & Physical Science Research Council (EPSRC)
Grant Number
EP/M020975/1
Subjects
Science & Technology
Technology
Engineering, Biomedical
Engineering, Electrical & Electronic
Engineering
Chip-scale coil
implantable neural microsystem
integrated coil
mm-sized coil
microfabricated coil
near-field coupling
wirewound coil
wireless power transmission
SPIRAL INDUCTORS
WIRELESS POWER
RF ICS
TRANSMISSION
EXPRESSIONS
SILICON
MODEL
Animals
Equipment and Supplies
Prostheses and Implants
Ribs
Sheep
Transistors, Electronic
Wireless Technology
Ribs
Animals
Sheep
Equipment and Supplies
Prostheses and Implants
Transistors, Electronic
Wireless Technology
0903 Biomedical Engineering
0906 Electrical and Electronic Engineering
Electrical & Electronic Engineering
Publication Status
Published
Date Publish Online
2018-07-20