Quantifying error: extending static timing analysis with probabilistic transitions
File(s)
Accepted version
Author(s)
Murray, K
Suardi, A
Betz, V
Constantinides, GA
Type
Conference Paper
Abstract
Timing analysis is a cornerstone of the digital design
process. Statistical Static Timing Analysis was introduced to
reduce pessimism by modelling device delay variations. However
it ignores circuit logic, which may cause some timing paths
to never or only rarely be sensitized. We introduce a general
timing analysis approach and tool to calculate the probability that
individual timing paths are sensitized, enabling the calculation
of bounding delay distributions over all input combinations. We
show the connection to the well-known #SAT problem and present
approaches to improve scalability, achieving average results 46 to
32% less pessimistic than Static Timing Analysis while running
14.6 to 44.0 times faster than Monte-Carlo timing simulation.
process. Statistical Static Timing Analysis was introduced to
reduce pessimism by modelling device delay variations. However
it ignores circuit logic, which may cause some timing paths
to never or only rarely be sensitized. We introduce a general
timing analysis approach and tool to calculate the probability that
individual timing paths are sensitized, enabling the calculation
of bounding delay distributions over all input combinations. We
show the connection to the well-known #SAT problem and present
approaches to improve scalability, achieving average results 46 to
32% less pessimistic than Static Timing Analysis while running
14.6 to 44.0 times faster than Monte-Carlo timing simulation.
Date Acceptance
2016-11-11
Publisher
IEEE
Copyright Statement
© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Sponsor
Royal Academy Of Engineering
Imagination Technologies Ltd
Engineering & Physical Science Research Council (E
Engineering & Physical Science Research Council (EPSRC)
Grant Number
Prof Constantinides Chair
Prof Constantinides Chair
11908 (EP/K034448/1)
EP/I020357/1
Source
Design, Automation, and Test in Europe
Subjects
Science & Technology
Technology
Automation & Control Systems
Engineering, Industrial
Engineering, Electrical & Electronic
Engineering
Publication Status
Accepted
Start Date
2017-03-27
Finish Date
2017-03-31
Coverage Spatial
Lausanne, Switzerland