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Showing results 1 to 20 of 36  next >
Issue DateTitleAuthor(s)
21-Feb-2016A Case for Work-Stealing on FPGAs with OpenCL AtomicsRamanathan, N; Wickerson, J; Winterstein, F; Constantinides, GA; , et al
17-Sep-2018A high throughput polynomial and rational function approximations evaluatorBrisebarre, N; Constantinides, GA; Ercegovac, M; Filip, S; Istoan, M, et al
3-Feb-2020Accelerated approximate nearest neighbors search through hierarchical product quantizationAbdelhadi, A; Bouganis, C; Constantinides, G; , et al
31-Aug-2017Algorithms and arithmetic: choose wiselyConstantinides, GA; , et al
6-Dec-2018An efficient FPGA-based axis-aligned box tool for embedded computer graphicsChatzianastasiou, G; Constantinides, GA;
18-May-2017An efficient implementation of online arithmeticZhao, Y; Wickerson, J; Constantinides, GA; , et al
5-Feb-2018architect: Arbitrary-precision Constant-hardware Iterative ComputeLi, H; Davis, JJ; Wickerson, JP; Constantinides, GA; , et al
Feb-2020ARCHITECT: Arbitrary-precision Hardware with Digit Elision for Efficient Iterative ComputeLi, H; Davis, J; Wickerson, J; Constantinides, G; , et al
9-Dec-2019Automatic generation of multi-precision multi-arithmetic CNN accelerators for FPGAsZhao, Y; Gao, X; Liu, J; Wang, E; Mullins, R, et al
1-Jan-2017Automatically comparing memory consistency modelsWickerson, J; Batty, M; Sorensen, T; Constantinides, GA; , et al
21-Feb-2016Automatically Optimizing the Latency, Area, and Accuracy of C Programs for High-Level SynthesisGao, X; Wickerson, J; Constantinides, GA; , et al
1-Apr-2019Calculated risks: quantifying timing error probability with extended static timing analysisMurray, K; Suardi, A; Betz, V; Constantinides, GA; , et al
1-Mar-2017Certified roundoff error bounds using semidefinite programmingMagron, V; Constantinides, G; Donaldson, AF; , et al
13-Jul-2015Certified Roundoff Error Bounds Using Semidefinite Programming.Magron, V; Constantinides, GA; Donaldson, AF; , et al
18-Dec-2015Computer Architectures to Close the Loop in Real-time OptimizationKerrigan, EC; Constantinides, GA; Suardi, A; Picciau, A; Khusainov, B, et al
13-Sep-2016Custom Multi-Cache Architectures for Heap Manipulating ProgramsWinterstein, F; Fleming, K; Yang, H-J; Constantinides, GA; , et al
31-May-2019Deep neural network approximation for custom hardware: where we've been, where we're goingWang, E; Davis, J; Zhao, R; Ng, H; Niu, X, et al
Feb-2019EASY: efficient arbiter SYnthesis from multi-threaded codeCheng, J; Fleming, S; Chen, YT; Anderson, J; Constantinides, G, et al
1-Feb-2017Hardware synthesis of weakly consistent C concurrencyRamanathan, N; Fleming, S; Wickerson, J; Constantinides, GA; , et al
18-Aug-2016KAPow: A System Identification Approach to Online Per-Module Power Estimation in FPGA DesignsHung, E; Davis, JJ; Levine, JM; Stott, EA; Cheung, PYK, et al