Showing results 1 to 20 of 36
next >
| Issue Date | Title | Author(s) |
| 21-Feb-2016 | A Case for Work-Stealing on FPGAs with OpenCL Atomics | Ramanathan, N; Wickerson, J; Winterstein, F; Constantinides, GA; , et al |
| 17-Sep-2018 | A high throughput polynomial and rational function approximations evaluator | Brisebarre, N; Constantinides, GA; Ercegovac, M; Filip, S; Istoan, M, et al |
| 3-Feb-2020 | Accelerated approximate nearest neighbors search through hierarchical product quantization | Abdelhadi, A; Bouganis, C; Constantinides, G; , et al |
| 31-Aug-2017 | Algorithms and arithmetic: choose wisely | Constantinides, GA; , et al |
| 6-Dec-2018 | An efficient FPGA-based axis-aligned box tool for embedded computer graphics | Chatzianastasiou, G; Constantinides, GA; |
| 18-May-2017 | An efficient implementation of online arithmetic | Zhao, Y; Wickerson, J; Constantinides, GA; , et al |
| 5-Feb-2018 | architect: Arbitrary-precision Constant-hardware Iterative Compute | Li, H; Davis, JJ; Wickerson, JP; Constantinides, GA; , et al |
| Feb-2020 | ARCHITECT: Arbitrary-precision Hardware with Digit Elision for Efficient Iterative Compute | Li, H; Davis, J; Wickerson, J; Constantinides, G; , et al |
| 9-Dec-2019 | Automatic generation of multi-precision multi-arithmetic CNN accelerators for FPGAs | Zhao, Y; Gao, X; Liu, J; Wang, E; Mullins, R, et al |
| 1-Jan-2017 | Automatically comparing memory consistency models | Wickerson, J; Batty, M; Sorensen, T; Constantinides, GA; , et al |
| 21-Feb-2016 | Automatically Optimizing the Latency, Area, and Accuracy of C Programs for High-Level Synthesis | Gao, X; Wickerson, J; Constantinides, GA; , et al |
| 1-Apr-2019 | Calculated risks: quantifying timing error probability with extended static timing analysis | Murray, K; Suardi, A; Betz, V; Constantinides, GA; , et al |
| 1-Mar-2017 | Certified roundoff error bounds using semidefinite programming | Magron, V; Constantinides, G; Donaldson, AF; , et al |
| 13-Jul-2015 | Certified Roundoff Error Bounds Using Semidefinite Programming. | Magron, V; Constantinides, GA; Donaldson, AF; , et al |
| 18-Dec-2015 | Computer Architectures to Close the Loop in Real-time Optimization | Kerrigan, EC; Constantinides, GA; Suardi, A; Picciau, A; Khusainov, B, et al |
| 13-Sep-2016 | Custom Multi-Cache Architectures for Heap Manipulating Programs | Winterstein, F; Fleming, K; Yang, H-J; Constantinides, GA; , et al |
| 31-May-2019 | Deep neural network approximation for custom hardware: where we've been, where we're going | Wang, E; Davis, J; Zhao, R; Ng, H; Niu, X, et al |
| Feb-2019 | EASY: efficient arbiter SYnthesis from multi-threaded code | Cheng, J; Fleming, S; Chen, YT; Anderson, J; Constantinides, G, et al |
| 1-Feb-2017 | Hardware synthesis of weakly consistent C concurrency | Ramanathan, N; Fleming, S; Wickerson, J; Constantinides, GA; , et al |
| 18-Aug-2016 | KAPow: A System Identification Approach to Online Per-Module Power Estimation in FPGA Designs | Hung, E; Davis, JJ; Levine, JM; Stott, EA; Cheung, PYK, et al |